Designing With Digital Logic Families: Basics

The designers of complex digital boards generally deal with multiple supply voltages on their boards. While interfacing the IOs of one device to the other, the designer should make sure that the IO type of the driver is compatible to that of the receiver and the right part is chosen for the right application.

While working with the digital ICs, the first set if parameters we would look at, are the input & output voltage level parameters VOH and VIH. The Figure 1 illustrates the IO voltage levels of some popular logic families. For example, we can directly connect a 5-V CMOS output to a 5-V TTL input, but the vice-versa is not permitted. Again, we can connect a 5-V TTL output to a 3.3-V TTL input, provided the 3.3-V input is 5-V tolerant. Also note that, the families such as AHCT, HCT, ACT, (omitted in Figure 1) can accept 5-V TTL input levels, but drives 5-V CMOS levels. Hence these families can act like bridge between 5-V TTL and 5-V CMOS logic levels. The table 1 below presents a summery of the compatibility chart between the popular logic families.

Please note that '*' mark indicates that the compatibility is possible only if the input stage is tolerant to the maximum voltage output level provided by the driver. The designer also need to calculate the noise margin as below:

Noise Margin Output High = VOH (driver) - VIH (receiver)

Noise Margin Output Low = VIL (receiver) - VOL (driver).

Higher noise margin indicates higher noise immunity. Also note that, negative noise margin indicates a sign of incompatibility.

The next set of important parameters we would like to examine are the "fan-in" and "fan-out". These numbers indicate the sinking and sourcing capabilities of input and output stages. These parameters are calculated as below:

Fan-out Output High = IOH (driver) / IIH (receiver)

Fan-out Output Low = IOL (driver) / IIH (receiver)

As we can see, the above calculations must be made for each of the two logic levels. Naturally, the smaller the resulting numbers determines the actual fan-out. The fan-out calculations can be used not only for the gates of a particular family, but also among different families.

Another important parameter to consider while choosing a logic family is the "propagation delay" or more generically known as speed. This parameter helps in analyzing whether the output timings meet the set-up and hold-up time requirements of the input stage satisfactorily. Again, as the speed increases (i.e. lesser the propagation delay), the power dissipation increases. Hence the "speed-power" product is also important to select the right logic family for the right application.

Some More Things To Remember While Using Digital Logic Families:

• Connections between ICs and other devices must be kept as short as possible. As the operating frequency increases, the inductance of the long traces plays an important role to induce distortion on the digital signals. If the frequency is high enough, the long traces between these ICs acts like transmission line. Phenomenons such as reflections and ringing can be controlled by using proper termination resistors.
• Proper decoupling capacitors should be used as close to the VCC pin as possible. This is to avoid power supply glitches due to digital switching.
• The unused input pins must not be left floating to avoid high current drawn due to oscillation of the floating gates, and possible damage of the IC. Connect the unused inputs to either VCC or ground preferably using resistors in series.
• Timing analysis must be done to check if set-up/hold-up parameters are violated or met.

P.S. I would like to request to the readers of this article to share their comments, suggestions or correction about this topic in order to enrich this article.