Sunday, September 30, 2012

My Experience With "Noise": Part IIIa

Electrical Fast Transient (EFT):

Anybody having experience with EMC testing should be well conversant with this term "EFT". For others, EFT is also a transient noise, that occurs due to the switching of power relays or the interruption of inductive loads on the power mains. The standard IEC 61000-4-4 or EN61000-4-4 describes the test procedures for subjecting EFT noise to the equipment under test, trying to simulate the real life EFT noise that might be present in an industrial environment. While designing an electronic device or system, the designer must take precautions against the design's vulnerability to EFT. As I have experienced, things gets much harder to fix a circuit failing in EFT test if the appropriate measures had not been incorporated in the design proactively.

Understanding the source of EFT:


When an electrical circuit is switched off, the current flowing through the switch contacts is interrupted more or less instantaneously. Hence at the moment of switching there is a high (ideally infinite) di/dt. Due to stray inductance associated with the wiring, types of inductive loads such as motors or solenoids, the voltage developed across an inductance L by a changing current i is:
V = - L . di/dt
This high instantaneous voltage causes the increasing air gap across the contacts to break down and a current flows again, which collapses the voltage spike, so that the briefly formed arc extinguishes. But this re-interrupts the current, hence another voltage spike appears, creating a further arc. This process repeats itself until the air gap is large enough to sustain the applied voltage without breakdown. At this point the circuit can be said to be properly switched off. The visible effect of this is a brief spark between the breaking contacts of the switch, but actually this consists of a series of microsparks whose repetition rate and amplitude depend on the circuit and switch parameters.
This burst of noise is the EFT noise which can appear at the power mains inlet of the device. Since the pulses are very fast (order of nanoseconds) they couple effectively through mutual capacitance and inductance to other wiring in close proximity to the source wiring such as control, communication or sensor lines. Voltage spikes typically of hundreds or thousands of volts, may appear on any such coupled circuits. 


When we should worry about:

Though it is not impossible for the transients to be coupled into a victim in close proximity inductively, but generally EFT noise enters the product via the cable connections, getting coupled capacitively. Any electronic device with power cable(s), IO cable(s) or communication cable(s) is the candidates susceptible to failure due EFT noise if the proper design methodologies are not followed to prevent failure due to EFT. On signal ports the EFT spikes are almost invariably in common mode. Common mode coupling on mains includes the protective earth wire.

In the next part (IIIb) we will discuss more on the measures to avoid the design getting susceptible to failures due to EFT noise. 

 

Sunday, October 11, 2009

My Experience with "Noise" (Part II)

Electro Static Discharge (ESD):

I believe most of us have experienced the static electric shock some point of time and are aware about how static electricity is formed. Hence I'm not going to bore you by going into those theories again. Also we know that the generation of static electric voltage is more effective in a dry climatic condition. For your information, the following table shows different means of static electricity generation and the respective voltage levels (Source: ESD Association).

====================== ==============================
Means Of Generation--------------V (10-25% RH)-----V (65-90% RH)
====================================================
Walking across carpet------------------35,000-----------------1,500

Walking across vinyl tile---------------12,000-------------------250

Poly bag picked up from bentch------20,000----------------1,200

Getting up from chair with
Urethane foam-----------------------------18,000----------------1,500
====================== ==============================
In the manufacturing environment, ICs are only specified to survive 2KV HBM (Human Body Model: standard intended to simulate a person becoming charged and discharging from a bare finger to ground through the circuit under test), although some have been specified as high as 8KV while others - particularly newer parts in very small geometry processes - can be 500V or less.

The standard IEC 61000-4-2 specifies the test methodologies & measurement techniques to test the electronic products (& systems), which simulates the real industrial environment having possible ESD hazards. Electronic products are required to be tested for ESD immunity (IEC 61000-4-2) to insure their continued reliable operation if subjected to ESD after commissioned in the field. The European Union’s EMC Directive 2004/108/EC (replaced 89/336/EEC) mandates ESD immunity testing for virtually all electrical and/or electronic products as a requirement for obtaining the CE Mark before shipping to a member state of the European Union. As per IEC 61000-6-2: 2005, Electromagnetic Compatibility (EMC): Generic Standard, a device shall be tested as per IEC 61000-4-2 to verify that it passes the following test levels (at minimum):

1. Air Discharge: 8KV
2. Direct (Contact) Discharge: 4KV
The standard for ESD, IEC 61000-4-2 specifies the standard strike waveform. It is worth to study the nature of the waveform before designing the necessary protection in the circuit.

The ESD waveform specified in IEC 61000-4-2 has a rise time of 0.7 ns to 1.0 ns, resulting in a noise bandwidth (1/πtr) of approximately 450 MHz. This is an important factor to consider while choosing appropriate circuit components.


Protection against ESD:

There could be several way we could protect our devices from ESD. Where ever applicable, one could use series blocking resistor, ceramic capacitor, opto-isolation, bare guard trace, dual-rail clamping diodes, zener diodes, MOVs, TVS diodes or a combination of some of these techniques. The articles published in the following links could be useful as references:
It is not only about selecting a suitable protection device but also important to pay careful attention to the layout design. It is necessary to follow cautious approach in implementing a proper ground system such that the returning current through the protection circuit doesn't interfere with the rest of the circuit in operation. In case of a TVS, the common practice to refer the protection circuit to chassis ground or, in case of systems with non-conductive enclosures, power ground. Mount the TVS closest (as possible) to the entry point, use short and wide traces and used dedicated ground plane if possible, avoid loops and other best practices of high speed design.

Next, we are going to continue our discussion on "Electrical Transient Burst (EFT)' in part III.